Making a Small Larson Scanner With Two LogicBoards From MH-EDU-Electronics

The LogicBoard (STEM Logic Gates Experimentation Lab) from MH-EDU-Electronics is an affordable, small board for learning about logic gates which are the fundamental building blocks of digital computers. It has 13 gates, three switched inputs and three red LED outputs.

This article shows how to use the output LEDs as a very small Larson Scanner. The moderately complex circuit for this uses the oscillator created in Instructables: Making an Oscillator With LogicBoard From MH-EDU-Electronics. Two approaches are explored and the second one using a D-type flip-flop made from the gates on the LogicBoards is shown. D-type flip-flops are the basis for one type of computer memory.

Two LogicBoards are needed to make this due to the number and type of gates required. The article shows how to power one from the other. This is both convenient and a requirement as a shared/common ground is needed for the gates to work together. Eight extra 20cm cables are required for inter-board connections, plus a resistor and a capacitor are required for the oscillator.

The LogicBoard can be used with an Arduino UNO. Another product, the 8 gate LogicShield is specifically designed for use with an Arduino. Instructables: Making a Full Adder With LogicBoard From MH-EDU-Electronics includes more information about the LogicBoard.

Supplies

Two MH-EDU-Electronics LogicBoard: Tindie
A resistor - 8.2M is used in this article (should be above 10k).
A capacitor - a 220nF ceramic capacitor is used in this article. Any values that multiple to approximately 2 will work well, e.g. a 2.2uF paired with 1M resistor.
One power source with 2.1mm centre-positive DC barrel jack connector (same as Arduino UNO)
A 4xAA battery pack with a connecting lead or
a mains power supply between 4V and 6V.
Two 20cm female-female jumper cables, red and black, to connect power between the boards.
Six more 20cm female-female jumper cables for inter-board connections.
Some extra 10cm female-female jumper cables if you wish to use a colour scheme for cabling.

Step 1: Design

The sequence on the LEDs to make an illuminated one appear to move back and forth is shown below and in the animation above.

Step | AB | XYZ
---------------
  1  | 00 | 100
  2  | 01 | 010
  3  | 10 | 001
  4  | 11 | 010

The sequence repeats after the fourth step by returning to the first step. The step numbers are shown numbered 1-4 and in binary. The binary numbers start at 0 as this is more natural for simple logic counters. The values for X, Y and Z are easily generated from simple gates from the counter bits, A and B. A and B here are not referring to the LogicBoard's switch inputs.

X = A NOR B
Y = B
Z = A AND NOT B

This raises the question of how to generate a counter which counts from binary 00 to 11 and then returns to 00 to repeat ad infinitum.

Step 2: Counter Design I

Two oscillators with different rates appear to be an attractive solution because each one only uses a single gate and two extra passive components and they are easy to build. If the first oscillator has a rate that's half of the second one then they can generate the correct step numbers.

 Step  | OSC1 | OSC2
       | slow | fast
--------------------
1 (00) |   0  |   0
2 (01) |   0  |   1
3 (10) |   1  |   0
4 (11) |   1  |   1

The oscillators need to start at the same time. This looks achievable as the NAND based design has an ENABLE input which can be connected to the same switch to notionally start the oscillators together.

The low-relevance image above is from Stable Diffusion with input "two synchronised relaxation oscillators built from logic gates driving two red LEDs" in Digital Painting style.

Step 3: Counter Design I Issues

The simulation (left above) and LogicBoard implementation (right above) reveal a whole set of problems with the two oscillator approach.

Starting the oscillators together does not appear to work all the time for both the simulator and LogicBoard implementations. There are several issues here, one is the existing charge on each of the capacitors.
One oscillator needs to run at exactly double the rate of the other. The resistor values for the implementation above are 8.2 megaohms and a pair of the same to create 16.4M. Two 220nF ceramic capacitors partner those. The resistors were measured and selected from a group of nine for being close to the required values but despite this the rate difference is obviously incorrect on the LogicBoard at about 1.7x. The simulation is very close at 2.004x but not perfect.
The duty cycle is not exactly 50%. The simulator ones are consistently low, the LogicBoard fast oscillator looks reasonable but the slow one (yellow) is significantly low.

The oscillators might be tuneable by varying the resistors to get very close to 2x difference but they are unlikely to start synchronised and even a tiny rate difference will mean they will drift apart. There's no obvious way to set the duty cycle.

In general, the duty cycle appears to be better (closer to 50%) if the LEDs are driven by an extra gate. The OR gates here are being used with their inputs connected to make a pair of buffers to drive the LEDs.

In conclusion, the two oscillator approach appears unsuitable to create a counter.

Generic gates are being used here in the circuit simulator. More sophisticated circuit simulators have large libraries of components with models that more closely match the behaviour of real products.

One area where two (or more) oscillators are often used together is synthesizers. These may have an oscillator sync feature to keep them synchronised.

Step 4: Counter Design II

The classic approach for building a counter is to use a clock (the output an oscillator) and divide the rate by two repeatedly. This can be achieved with J-K, D or T-type flip-flops. If those are clocked with an oscillator and then set/configured to toggle their value and that value is fed into any successive flip-flop's clock input it will create an N bit counter from N-1 flip-flops. For a 2 bit counter, just one flip-flop is required.

Latch vs Flip-flop

The terminology isn't universally consistent but it's common now for

latch to refer to a level-triggered device and
flip-flop to refer to an edge-triggered one.

The two types of triggering are described below.

Level-triggered: the gate responds to or "reads" its inputs for the whole period while the clock level is either low or high. A latch can work well when it is set to a specific value. Toggling is unlikely to have well-defined behaviour and may repeatedly toggle at an extremely high, unpredictable rate like an oscillator.
Edge-triggered: the gate responds to or "reads" its inputs for a brief period as the clock changes. This will either be from low to high (rising) or high to low (falling).

The D-type flip-flop shown above in Falstad Circuit Simulator is the standard one from its library with the NAND gates replaced by AND and NOR gates. The behaviour is identical and this gate selection makes it more suitable for implementation on the LogicBoard as a NAND gate is already used for the oscillator. This design reads its D input for the whole clock-high period and the final value when the clock falls is propagated to the Q output.

Step 5: High Level Larson Scanner Design

The high level design is shown above. The clock (clk) can be created from the oscillator in Making an Oscillator With LogicBoard From MH-EDU-Electronics. As shown previously, the D-type flip-flop can be created from 4 AND, 4 NOR and 2 NOT gates. A few extra gates are required to map the counter values to the LED sequence.

Step 6: Larson Scanner Implementation on Two LogicBoards

The implementation is shown above. There are three output values but six LEDS, a pair of LEDs is driven per output for greater visual effect. There are four sections listed below.

An oscillator produces a square wave output, the lower bit B of the counter.
A D-type flip-flop provides the upper bit A of the counter.
A set of gates provide logic to map counter values to LED values. Due to gate availability this needs to be expressed in a different way to the previous equations.
Some gates are used as buffer gates for LEDs. Here, this means a gate that's not part of the oscillator nor the flip-flop to drives the LEDs. This is even more important for driving two LEDs per output due to the higher current requirement. The supply voltage is best kept low for outputting to two LEDs from one gate.

The second OR gate from the top on the lower LogicBoard is redundant and does not need to be used. It does not feature in the video on the next page.

Gate Substitution

The two LogicBoards do not have enough gates to the build the design as described so far but there are some spare gates. The mapping logic can be rewritten to use the remaining gates.

X = A NOR B     = ( A OR B ) XOR 1
Y = B           = B OR B
Z = A AND NOT B = (A' OR B) XOR 1

A XOR gate with one input set to 1 implements a NOT. The OR gate for producing the value of Y is there as a buffer to drive the pair of LEDs. A' represents the NOT A output conveniently produced by the flip-flop.

Supply Voltage

The board is intended for use between 4-14V. Most users are likely to be in the 5-10V range based on popular power sources. The current through the red LEDs will be approximately (supply voltage - protection diode drop - LED forward voltage ) / 1k resistor. For 10V this would be (10.0 - 0.6 - 1.6) / 1000 = 10-0.6.1.6 = 7.8mA. Driving two LEDs at 6V will be 2 * (6.0 - 0.6 - 1.6) / 1000 = 2 * 3.8 = 7.6mA. In terms of power dissipation in the logic chip this is (6.0V - 0.6V) * 7.6mA = 41mW compared to the TI CD4071 absolute maximum of 100mW per gate output.

Step 7: Making and Testing the Larson Scanner

The vacillators have been joined by an extra character with some expertise in Larson scanners. A time ordered description of their construction activity follows.

00:09 Take away the 9V battery power.
00:13 Swap the resistor and capacitor to increase the flashing speed (oscillation rate).
00:18 Add a D-type latch.
00:27 Bring in the second LogicBoard where they have already constructed a second D-type latch.
00:33 Start adding the interconnections using longer 20cm (8") cables including a black and red pair to connect 0 and 1 to power the other board and have a shared/common ground.
00:37 Add the rest of the cables to distribute latch outputs around and for the decoding logic.
00:56 The cabling is complete!
01:03 The 6V power from PSU is connected.
01:06 The oscillator is enabled starting the counter and scanning sequence.

The construction carefully followed the simulator schematic with a few intentional deviations. Testing the components of the design as it's constructed will help to ensure the circuit works correctly.

The power source here is a centre-positive "wall-wart" power supply set to 6V rather than the 9V battery previously used. This keeps the total LED current per gate output to a reasonable level.

The next page lists the connectivity and cables used.

Step 8: Connectivity and Cables

All cables are 10cm unless specified. The 20cm cables are extra ones not supplied with the LogicBoard. If you are using the 10cm cables supplied with the LogicBoards then it won't be possible to match all of the colours.

Yellow is used for the oscillator output on the top LogicBoard (LB1) which forms the lower bit (B) of the counter. Green is used for both flip-flop outputs which represent the upper bit (A and A') on the bottom LogicBoard (LB2).

The switch input A on the top board is not the same as the A output from the flip-flop. The original logic design shown in the simulator on a previous page used switch input C to remove this possible source of confusion.

Power (LB1 - LB2):
1 20cm red cable and 1 20cm black cable for connecting 0 and 1 between boards for shared/common ground and power.
Oscillator (LB1):
1 orange cable for switch input A as an ENABLE for the oscillator;
1 orange and 1 blue cable for the 8.2M resistor;
1 black and 1 white cable for the 220nF ceramic capacitor;
1 yellow to master D-type clock.
D-type flip-flop.
Master D-type latch (LB1):
1 yellow to connect AND clocks;
2 grey for NOR feedback;
2 brown for AND to NOR;
2 brown for NOT;
1 20cm yellow to connect B to NOT on LB2;
1 20cm blue to connect master D-type data to D-type slave data.
Slave D-type latch (LB2):
1 blue to connect AND clocks;
2 grey for NOR feedback;
2 brown for AND to NOR;
2 brown for NOT;
1 20cm green from A to Master D-type data;
1 blue for slave clock from NOT.
Mapping logic:
1 red and 1 blue for XOR (LB1) and 1 yellow to B and 1 green 20cm to A for OR (LB1);
1 red for 1 blue for XOR (LB2);
1 20cm yellow for B to top OR (LB2) and 1 green from A' to OR (LB1);
5 purple and 1 purple 20cm to connect gates to the six LEDs;
2 yellow for B to OR (LB1).

Cable Counts

LB1: 1 black, 4 brown, 1 red, 2 orange, 5 yellow, 2 blue, 3 violet/purple, 2 grey, 1 white.
LB2: 4 brown, 1 red, 1 green, 3 blue, 2 violet/purple, 2 grey.
Interconnects: 1 black, 1 red, 2 yellow, 2 green, 1 blue, 1 violet/purple.
Total: Interconnects: 8x20cm, LB1 21x 10cm, LB2 13x 10cm.

The violet/purple cables do not colour match between the 10cm and 20cm batch. These cables are only used here for connections to the LEDs making it easy to distinguish them.

Minor Differences to Simulator Implementation

Switch input A rather than C is used to enable the oscillator on LB1.
The lower OR on LB2 isn't used. It was used as a buffer in the simulator but isn't needed as no LEDs are driven from it directly.
The cables for power interconnection aren't shown in the simulator.

Step 9: Going Further

Some ideas for areas to explore:

Add a variable resistor in series with another resistor to control the scan rate.
Create a multi-bit adder.
Work out how many gates are needed for a full resolution 6 LED scanner and how many LogicBoards this equates to.
Use a Texas Instruments CD4017B on an external breadboard to help to create a full resolution 3 or 6 LED scanner.
For C programmers with an Arduino UNO, use the MH-EDU-Electronics PandaShield or LogicShield (or breadboard with LEDs and current-limiting resistors) to create a Larson scanner.

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